The crossbar switch that we envisage constructing is shown schematically in figure 2 and figure 3. Data is presented, in parallel, in the form of 64 optical signals in a square array – ideally from an 8×8 VCSEL array or, if preferred, through an array of optical fibres. Diffractive optics [7], [8] replicate this set of inputs 64 times across the area of the smart pixel array. This latter, illustrated in figure 3, comprises 4,096 detectors (InGaAs pin MQW photodiode) solder-bump coupled to the underlying silicon IC. The silicon is broken up into 64 identical areas, each receiving the full set of inputs as well as feeding one of the possible output channels. As each signal arrives the 6-bit header is decoded and if it matches the destination fed by that fan-in group it is directed to the (optical) output – a modulator on the optoelectronic chip (InGaAs pin MQW electro-absorption). Thus there are a total of 64 optical (modulator) outputs configured, once again, as an 8×8 array. These modulators are read by a corresponding set of beams, derived from a separate laser, which are reflected from this opto-chip and then passed to the final detector array (or possibly output fibres). This detector array – which would again be based on the same hybrid InGaAs/Si construction – outputs the 64 channels in the required electrical format. (Note that this is a much easier task than attempting to drive signals directly off the edge of the considerably larger, and more dense, switching chip.)
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Figure 2: General layout of demonstrator optical crossbar. |
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Figure 3: Hybrid optoelectronic "smart pixel" array. |
A major task of the switching chip is to resolve contention problems. This can be conveniently done within the area of each fan-in group with the required buffering included by the addition of memory in parallel to the output. Sufficient space should be available to include this on the IC, provided 0.7 mm CMOS (or BiCMOS) is used. An alternative approach to buffering could be to add one or two additional outputs (i.e. with extra modulators on the opto-chip) and include matching memory and multiplexers on the final output chip.
Note that, provided the lenses are appropriately designed, the input wavelength need not be the same wavelength as the output. In fact different wavelengths could be used to advantage to minimise losses on the beam-splitters. It follows that the input VCSEL array could be 980 nm while the modulators operate at, say 1064 nm. Alternatively, 850 nm VCSELs could be used with 980 nm modulators in conjunction with removal (or preferably thinning) of the GaAs substrate of the switching chip.
The philosophy underlying this design is the use of a 2-D array structure to create a scalable switch. The signals are grouped in close proximity to the corresponding output channels. Consequently the distance travelled to an (optical) output scales as logN, rather than N, which would be the case for electrical edge connections. The problem of supplying all the necessary inputs to each fan-in group is solved by employing an optical fan-out – a distributed connection task that is particularly well suited to optics.
Another aspect that requires attention is the overall size of this experimental system. Using the optomechanical assembly techniques that we have already developed, we currently anticipate a footprint of about 15cm×10cm – comparable to the size of small board. However we shall be seeking further size reductions, for example, by the use of graded-index lenses.
The above details represent our current thinking. Clearly better alternatives will be considered as work progresses. For example, the use of VCSELs in place of the modulators, will be assessed. However, the design as outlined can be implemented with a combination of techniques that are either already available to the SPOEC consortium or can be developed at the early stages of the project. It therefore represents a baseline demonstrator system.