SPOEC - Approach |
ApproachThis project aims to build on recent advances made in the Scottish Collaborative Initiative in Optoelectronic Sciences (SCIOS) by the Heriot-Watt and Glasgow University groups in developing hybrid CMOS/InGaAs "smart-pixel" techniques [3]. In this work InGaAs electro-absorption modulator and detector arrays have been flip-chip assembled with CMOS IC's to provide free-space optical interconnects. In March 1995 the UK Engineering and Physical Sciences Research Council announced a further 4-years funding for the SCIOS programme. This research includes the construction of an optoelectronic data sorter based on two CMOS/InGaAs smart-pixel arrays. This system is in an advanced state of design and incorporates optical I/O to the IC's at the level of 200Gbits-1. We are consequently now in a good position to look forward to the next stage of development of these techniques and their application in new areas. Thus this proposal aims to take advantage of an existing investment by bringing the SCIOS facilities and experience together with the requisite expertise in related areas that is available elsewhere in Europe to establish effective methods of creating and exploiting high-speed silicon/optoelectronic interconnects. Two general approaches to interfacing optics and electronics can be identified: (i) using wave-guide or fibre-optic methods, and (ii) the free-space optic approach. The first is particularly suited to a relatively low number of optical links with high-speed multiplexing of signals into these optical channels. Scaling up to many (e.g. hundreds of) independent connections, however, is more problematic. The second approach – the one being taken in this project – relies on large numbers of optical connections (i.e. 103) capable of operating at the chip clock-frequency and distributed in two-dimensional array format across the face of the IC, forming an overall three-dimensional interconnect topology. As already noted in the previous section, this has great potential for scaling up to higher performance. Two 3-D optoelectronic interface technologies are to be investigated in this project.
As a focus for the technology development and to explore how high-bandwidth free-space optical interconnects of this type can be used in practice we propose to build an experimental demonstrator system. This will be a crossbar switch, based upon the matrix-matrix configuration developed in the project: "Optically Connected Parallel Machines (OCPM)". That was a UK industry/university collaboration in which a 64×64 single-stage optical crossbar switch was successfully operated at bit error rates of ~10-12 for 270Mbits-1 signals [6]. The Heriot-Watt University group designed and constructed its optical and optomechanical hardware. A major limitation to its performance, however, was the relatively slow reconfiguration time: ~25ms, determined by the liquid-crystal spatial light modulator that controlled its operation. By exploiting the semiconductor "smart-pixel" approach described above this path switching time could be reduced to a few nanoseconds (i.e. equal to the data rate). Our system demonstrator will also differ from the previous work in that all signals will be regenerated as they pass through the switch, ensuring that optical power loss will not limit the ultimate performance. (This is in contrast to multi-stage guided-wave switches in which low throughput can be a severe problem.) In addition we anticipate using electronic, rather than optical, fan-in of signals to the (optical) output. The philosophy throughout will be to use optical methods only where they have a clear advantage over the electronic alternative. Details of this experimental system are presented in the section entitled "Systems Demonstrator". It is important to note that this crossbar is only one of many possible architectures. We have identified a number of schemes for developing free-space optical interconnects based on various smart pixel technologies. These include the use of high-contrast modulators for improved optical fan-in, beam-steering schemes using phase modulators, systems based on VCSEL/modulator combinations, and the exploitation of data transparent architectures. Novel possibilities include the creation of optical hypercube connection schemes of particular relevance to massive parallel processing applications. A significant part of this project will be devoted to a study of the advantages and disadvantages of these approaches and an assessment (both theoretical and experimental) of the device performance that they would demand. The experimental work on device development will target the technical specifications identified for the most promising architectures. |
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Last Modified 08/04/03 11:37:43. |